INTEGRA Call #1: Selected Projects

Comparative Study of Microdosimetry for Translational research

• Consuelo Guardiola

Biohybrid cells, a long-sought breakthrough that could redefine the future of nanomedicine

• José Antonio Plaza

The idea of delivering electronic chips into living cells has long captured the imagination of both scientists and the broader public, representing a true technological frontier. Embedding microsystem-based chips with integrated electronics inside cells could unlock entirely new ways to probe biology, enabling not only biochemical but also biophysical measurements at the level of single cells—capabilities that remain extremely limited today.

However, this vision faces a fundamental challenge: the small size of cells severely constrains the development of autonomous devices capable of harvesting energy, integrating electronics, sensing their environment, and communicating with the outside world.

This project aims to overcome these limitations by developing a new generation of miniaturized intracellular chips. By combining advanced semiconductor node technologies with in-house post-processing strategies for chip release and communication, we will create functional devices that bring sensing, actuation, and data transmission directly inside living cells.

Smart Microbattery-Enabled Self-Reconfigurable Electronic Devices

• Carme Martínez
• Ferran Pujol

The project seeks to integrate intelligent microbatteries with electronic devices. Pending further information.

Architecting the future of edge AI through geometry-defined analogue devices: Pre-designed Analogue Nanocylinder paths in Template-Ordered Nanoxide Electronics

• Mireia Bargalló
• Marta Fernández Regúlez

PaNeTONE develops a new memristive device technology aimed at enabling efficient and reliable analogue computing at the edge. While memristive devices are strong candidates for applications such as in-memory computing and neuromorphic hardware, their widespread adoption is still limited by variability and limited controllability at the device level. 

PaNeTONE addresses this challenge by introducing a technology in which device behaviour is intrinsically defined by design, enabling stable and reproducible analogue states without relying on complex external calibration schemes. The project explores how geometry and material engineering can be used as core technological parameters to improve predictability, energy efficiency and long term reliability. 

Over a 24 month period, PaNeTONE will design, fabricate and characterise prototype devices and small-scale test structures, identifying operating windows relevant for low-power edge AI applications. In addition, the same technological platform naturally supports hardware security functionalities, such as device authentication based on intrinsic physical signatures. PaNeTONE lays the foundations for a scalable, CMOS compatible analogue device concept for future edge intelligence systems.