Institute of Microelectronics of Barcelona IMB-CNM   

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Micro and Nanotechnology research for you

Our experience in the design field includes the modeling, simulation and synthesis of circuits, IPs and growing to systems on chip (form VHDL/ Verilog to ASIC/FPGA), Support and Training to users, purchases and general management of CAD, CAD development for internal use, Libraries and design kits development for internal and external technologies, Management of external kits Back-end: P&R, delay extraction/back-annotation and post layout functional and Fault simulation.

The main activities of this service deal with:

  • HDL/Verilog to ASIC/FPGA: Modelling, simulation and synthesis of circuits, IPs and growing to systems on chip
  • Support and training to users, purchases and general management of CAD
  • CAD development for internal use
  • Libraries and design kits development for internal and external technologies
  • Management of external kits
  • Back-end: P&R, delay extraction/backannotation and post layout functional and fault simulation

We use design tools from industry leading vendors.

CAD Tools
  • Cadence (IC and System packages, PCB Studio)
  • Mentor (Custom IC design, Physical verification, Flotherm)
  • Altera (Quartus II, Nios IP)
  • Ansys (Multiphysics)
  • Synopsys (System tools, Frontend verification, TCAD)
  • Silvaco (Suprem3, Athena, Atlas, Smartspice)
  • Mathworks (Matlab, Simulink)
Digital Microchip Analysis

Logical Simulation

  • Cadence simulation
    • Logical Cells analysis,
    • Verilog basic cells library definition.

Ordered Schematic

  • Cadence simulation
    • Logical Blocks identification and analysis,
    • Comparison Gates vs Blocks.

C++ Implementation

  • Algorithm simulation
    • Functions analysis,
    • Logical Algorithm reconstruction,
    • Comparison Blocks vs Code.
Responsible and contact:

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